4.4 Revised simulations

4.4 Revised simulations

We used the same devices use in chapter 3 (3.5 nm oxide and 2.2 nm oxide) with similar ambient conditions and performed the revised expressions for the operations and then compared the obtained results with that obtained through the simulations of physical alphapower law MOSFET model.

Studying the IDS vs. VGS curves, we find a good impact of the newly engaged trapped charges and depletion capacitance. For both of the specimens, the proposed model shows lower values at the initial points of the subthreshold region. In the initial region, physical alphapower law MOSFET model shows a quite constant rise in the values of drain current, where the proposed model shows a slightly curved rise in the values of drain current. This may be taken as an effect of the appearance of the newly introduced capacitances that are varied with the applied gate bias. These plots show that the subthreshold slope for proposed model shows a higher value (63.5 mV/decade) than the alphapower law MOSFET model (59.9 mV/decade) in case of 3.5 nm oxide. Similarly, revised model shows a higher value (62.4 mV/decade) in case of 2.2 nm devices than the previous model (59.4 mV/decade).

Al l the above IDS vs. VDS curves show a good adjustment with the calculated capacitance for the MOS devices model. As we have proceeded with the combination of the capacitances, we obtained a decrement by an order of 10 in the value of the total capacitance to that of the capacitance used in the alphapower law MOSFET model. All the plots here show same amount of decrement in drain current value than that of the alpha model.