Introduction

1.1 History

Metal Oxide Semiconductor Field Effect Transistor(MOSFET) is used in a vast 

mannerin VLSI design for high speed performance, safe operating area, unipolarity and

 easiness to be used in parallel. For the study of MOSFET characteristics and operations

models have been proposed. All these models have their own assumptions and

predictions. Due to scaling of MOSFETs, it has become very significant to consider the

effect of generated traps in SiSiO2 junction. The interface states although are not of

significance in case of thicker gate oxides but study of devices with tunneling oxide

thickness (~ 2 nm) shows that these almost negligible states have remarkable impact on

the drive current. As the oxide thickness is reduced these interfacetrapped charges

 become significant gradually. In earlier times, gate oxide thickness was so large that this

phenomenon was not noticeable, but introduction of nanotechnology puts a barrier in

determining the nature of the MOSFETs with ultra thin oxides. As a result, now a day it

is a matter of importance to consider the interface states during MOS operation.

1.2 A glimpse of previous works on interface trapped charges
A theoretical treatment on the process of hotelectron
emission from silicon into SiO2
was carried out by Ning [1]. He considered avalanche and nonavalanche injection
mechanism to calculate emission probability of the carriers at SiSiO2
interface. Yambae
and Miura [2] observed experimentally the flat band voltage shift due to the generation of
interface states because of electron trapping in the SiO2 film. They suggested that the
2 interface states, where electrons can be trapped, are generated due to the collisions of
electrons at the SiSiO2interface.Khosru and others [3] observed that holes are created  
 by ionizing radiation that produces new electronic states at the SiSiO2 interface resulting
in the formation of interface traps.


They also found a threshold voltage shift due to the trapping of carriers inside the SiO2
layer.

In a recent approach, KueiShan Wen and others [4] showed that the generated electron
traps at the SiSiO2interface enhance the degradation of MOSFET characteristics. To
determine the interface trapped charges in a SiSiO2 interface Guido Goreseneken and
others [5] used the charge pumping method introduced by Brugler and Jespers [6] and
represented a very keen analysis of energy distribution of interface trapped charges.
1.3 Outline of the report In this report, we represented our work in a few chapters.
These chapters are as follows:· Chapter 2: In this chapter, the physics and operation of
MOS devices are studied in detail. Especially, the theory of MOS capacitor is
presented. The dependency of MOS capacitance on frequency and applied voltage is also
showed. A brief description on the MOSFET operation is discussed in the end.
· Chapter 3: The physical alphapower law MOSFET model is explained in detail in this
chapter. The expressions of the model along with compact mathematical analyses and plots
of IDS vs. VGS curves and IDS vs. VDS curves for two different devices (3.5 nm oxide
and 2.2 nm oxide)are presented. Discussing briefly about the plots, an outline of the
operation of the ultrathin oxide MOSFETs are understandable. In the end 3portion of this
chapter an analysis of the subthreshold slope of thedevices is presented.

                                   Chapter 4: This chapter deals with the development of the physical
alphapower law MOSFET model. The incorporation of depletioncapacitance (Cd) and
interface trapped charge capacitance (Cit) shows an amount of difference in the IDS vs. VGS
 and IDS vs. VDS curves for both the devices. Respective plots in this purpose are included.
· Chapter 5: A detailed description on the location and properties of the interface states in a
MOS device is discussed here. Also, it includes a glimpse in the Si – SiO2 interface.

                                 · Chapter 6: This chapter deals with two types of determination process
of interface trapped charges: 1) The Charge Pumping Method or CP Method, 2) The Capac-
itanceVoltage Method or CV Method. Later in this chapter an analytical study and comparis-
on between this two methods is presented.